Design of an Input Matching Network

Started by sukishan, Jul 16, 2009, 02:37 PM

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Design of an Input Matching Network for a DC Biased 850 MHz Small Signal Detector

From Avago Technologies

This application note describes the use of the HSMS-2820 in small signal detector applications at 850 MHz. The single series diode (HSMS-2820) has a detection sensitivity of about 30 mV /µW; i.e., it can produce an output of about 30 mV for an input power of -30 dBm (1µW).

This general-purpose single diode is housed in a miniature, inexpensive plastic surface mount SOT-23 package. The input match circuit is the most critical item of the detector performance because it affects the sensitivity of the design. The detector is built on 0.031 inch thickness FR-4 material circuit board, producing a low cost design.

This is a small signal detector design so the main focus should be in the -50 dBm to -30 dBm input power range (square law region). This is the region where the output DC voltage of the detector will be proportional to the square of the input RF voltage, or simply proportional to the input power.

The optimum bias point for best sensitivity was empirically determined to be 3 µA but if the dynamic range needs to be increased to -20dBm, the bias can be increased to 15 µA to compensate. Temperature and higher input power (-20 dBm and above) will affect the sensitivity of the detector because they change the input impedance of the diode. There is an optimal matching circuit that gives a good sensitivity given a certain bias current, temperature and power
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