Intel screening questions

Started by Kalyan, Mar 15, 2008, 03:04 PM

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Kalyan

Intel screening questions

COMPUTER ARCHITECTURE QUESTIONS
1. For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?
2. Explain the operation considering a two processor computer system with a cache for each processor.
   What are the main issues associated with multiprocessor caches and how might you solve it?
3. Explain the difference between write through and write back cache.
4. Are you familiar with the term MESI?
5. Are you familiar with the term snooping?

STATE MACHINE QUESTIONS
1. Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
2. In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

SIGNAL LINE QUESTIONS
1. You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot,
    undershoot or signal threshold violations, what can be done to correct this problem?

VALIDATION QUESTIONS:
What are the total number of lines written in C/C++? What is the most complicated/valuable program written in C/C++?
What compiler was used?
Have you studied busses? What types?
Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an
instruction in a 5 stage machine? What is the throughput of this machine ?
How many bit combinations are there in a byte?
What is the difference between = and == in C?
Are you familiar with VHDL and/or Verilog?

MEMORY, I/O, CLOCK AND POWER QUESTIONS
1. What types of CMOS memories have you designed? What were their size? Speed? Configuration Process technology?
2. What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
3. What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
   Process technology? What package was used and how did you model the package/system?
  What parasitic effects were considered?
4. What types of high speed CMOS circuits have you designed?
5. What transistor level design tools are you proficient with? What types of designs were they used on?
6. What products have you designed which have entered high volume production?
   What was your role in the silicon evaluation/product ramp? What tools did you use?
7. If not into production, how far did you follow the design and why did not you see it into production?

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